Welcome to the Center for Automata Processing (CAP) website. Our mission is to build a vibrant ecosystem of researchers, developers, and adopters for the exciting new Automata Processor. We invite you to explore AP technology by reading about our Center’s research, learning about our partners’ AP applications, and keeping up with news in the community. Most of all, we hope you make use of the resources available on this site to get started on discovering AP technology yourself and how to leverage the Automata Processor to address your organization’s needs. And of course, we welcome new members, research collaborators, and sponsors, so leave us a note and we’ll be sure to get back with you right away.
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Professor Kevin Skadron, Director

Kevin Skadron

Kevin Skadron is the Director of the Center for Automata Processing and Chair of the Department of Computer Science at the University of Virginia. He received his B.S. in Electrical and Computer Engineering and B.A. in Economics from Rice University in 1994, and his Ph.D. in Computer Science from Princeton University in 1999. He spent the 2007-08 academic year on sabbatical at NVIDIA Research. He became Chair of UVA Computer Science Department in 2012. Skadron is the recipient of the 2011 ACM SIGARCH Maurice Wilkes Award and a Fellow of the IEEE and ACM. For the year 2003-04, he was named a University of Virginia Teaching Fellow.

Among other professional activities, he is co-founder and editorial board member of IEEE Computer Architecture Letters, for which he served as associate editor-in-chief from 2001-2009 and editor-in chief from 2010-2012. He has served on the editorial board of IEEE Micro from 2004-2012 and as co-founder/co-editor (with Kevin Rudd) of its “Prolegomena” column, as secretary-treasurer of ACM’s SIGARCH from 2007-2011, as technical program co-chair of PACT 2006, general co-chair for PACT 2002 and MICRO-37, and on numerous technical program committees. He has also given several keynotes; most recently, he presented the keynote for IISWC 2014.

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CAP Faculty

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Professor Mircea Stan, Associate Director

Mircea Stan is the Associate Director of the Center for Automata Processing at the University of Virginia. Mircea received the Ph.D. (1996) and the M.S. (1994) degrees in Electrical and Computer Engineering from the University of Massachusetts at Amherst and the Diploma (1984) in Electronics and Communications from the Polytechnic Institute in Bucharest, Romania.

Since 1996 he has been with the Charles L. Brown Department of ECE at the University of Virginia, where he is now a professor. Prof. Stan is teaching and doing research in the areas of high-performance low-power VLSI, temperature-aware circuits and architecture, embedded systems, spintronics, and nanoelectronics. He leads the High-Performance Low-Power (HPLP) lab. He has more than eight years of industrial experience, has been a visiting faculty at UC Berkeley in 2004-2005, at IBM in 2000, and at Intel in 2002 and 1999. He has received the NSF CAREER award in 1997 and was a co-author on best paper awards at ISQED 2008, GLSVLSI 2006, ISCA 2003 and SHAMAN 2002.

Mircea Stan
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Dr. Tho Nguyen, Managing Director

Tho Nguyen is the Managing Director of the Center for Automata Processing (CAP) and Senior Research Program Officer in the Computer Science Department at the University of Virginia. Tho is primarily responsible for project and program development as well as managing CAP operations. Tho obtained his PhD from the Department of Electrical Engineering (Systems, Controls & Robotics) at the University of Washington in 2009.

His past work focused on sensing, modeling, and application of controls for large-scale environmental systems. Tho’s current research interest is in extending cyber-physical systems theory and technologies to mitigate the impact of disruptions to large scale systems (i.e., resiliency). Tho has had extensive international research experience and was previously funded by NSF and USAID. Prior to joining UVa, Tho served as a AAAS Fellow appointed to the National Science Foundation, where he worked on the Cyber-Physical Systems Program (2013-2015). He is also a former J. William Fulbright Fellow and an NSF IGERT Fellow.

Tho Nguyen
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Rob Jones, Deputy Director Of UVA’s Applied Research Institute

Rob Jones, Deputy Director of UVA’s Applied Research Institute, helps coordinate research activities between the University of Virginia and the Department of Defense and Intelligence Community. Mr. Jones hold degrees in Electrical and Computer Engineering from the University of Virginia and Johns Hopkins University and is a certified Program Management Professional.

Through these areas of expertise, Mr. Jones assists the Center for Automata Processing by identifying areas of interest for research, and new partners in the community. Outside of the university, Mr. Jones is an outdoors enthusiast, enjoys working the family homestead, and runs a successful photography business.

Rob Jones
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Dr. Ke Wang – Research Scientist

Ke Wang is a research scientist in the Department of Computer Science at the University of Virginia. He received his BS from Beijing University of Technology in 2002 and received his PhD from Tsinghua University in 2007. After receiving his PhD, Wang worked as a postdoctoral research associate in the Department of Computer Science and Technology at Tsinghua University. He joined University of Virginia in 2012.

His research interests include applications and design of heterogeneous computer architectures and physical design. Currently, Ke is working on developing data mining algorithms on Micron’s Automata Processor.  In his spare time, Ke enjoys playing chess, Chinese chess, swimming, badminton, and table tennis.

Ke Wang
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Dr. Vinh Dang – Research Associate

Vinh Dang is currently a Research Associate at the Department of Computer Science, University of Virginia. His research interests are in the areas of automata processing, high performance computing, compressive sensing, electromagnetic scattering and inverse scattering, radar imaging, and numerical methods for electromagnetic problems. He is currently working on benchmarking automata processor performance against CPU/GPU/FPGA architectures.

Vinh received the B.Sc. degree from the Posts and Telecommunications Institute of Technology, Vietnam, the M. Eng. degree from University of Technology, Vietnam, and the Ph.D. degree from the Catholic University of America, all in Electrical Engineering, in 2003, 2006, and 2015, respectively. During his free time, he loves to listen to Vietnamese country music, read books in history, astrophysics, and kungfu stories, play ping pong and soccer.

Vinh Dang

CAP Graduate Students

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Jack Wadden
Graduate Research Assistant
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Jack Wadden
Graduate Research Assistant
Jack Wadden is a 5th year graduate student in computer science working with Professor Kevin Skadron. Jack is interested in all things heterogeneous and researches heterogeneous computation models.
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Chunkun Bo
Graduate Research Assistant
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Chunkun Bo
Graduate Research Assistant
Chunkun is a third year Ph.D. student in the Department of Computer Science at UVA. He received his Bachelor’s degree and Master’s degree from the Harbin Institute of Technology and University of Science and Technology of China respectively.
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Elaheh Sadredini
Graduate Research Assistant
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Elaheh Sadredini
Graduate Research Assistant
Elaheh is a second year PhD student in the Department of Computer Science at UVA. She is currently conducting research in the Laboratory for Computer Architecture at Virginia (LAVA) lab under supervision of Professor Kevin Skadron.
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Tommy Tracy II
Graduate Research Assistant
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Tommy Tracy II
Graduate Research Assistant
Tommy Tracy is a 3rd year Ph.D student in Computer Engineering at UVA. Tommy is currently working in Professor Mircea Stan's High Performance Low Power (HPLP) lab. His research is focused on accelerating bioinformatics and machine learning algorithms.
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Deyuan Guo
Graduate Research Assistant
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Deyuan Guo
Graduate Research Assistant
Deyuan is a 3rd year PhD student in the Department of Computer Science at UVA. His research interests are computer architecture and algorithms. Currently Deyuan is working on developing an algorithm for the Automata Processor.
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Kevin Angstadt
Graduate Research Assistant
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Kevin Angstadt
Graduate Research Assistant
Kevin is a 2nd year PhD student in the Computer Science Department and Olive B. and Franklin C. Mac Krell Fellow at the Jefferson Scholars Foundation. He is co-advised by Kevin Skadron and Westley Weimer.
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Tiffany Ly
Graduate Research Assistant
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Tiffany Ly
Graduate Research Assistant
Tiffany is a first year graduate student in the Department of Electrical Engineering at UVA. She is conducting research in the Virginia Image and Video Analysis (VIVA) lab under the supervision of Professor Scott Acton. Her research is currently exploring image processing applications on the automata processor.

CAP Administration

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Kim Gregg
Business Manager
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Kim Gregg
Business Manager
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Debbie Rose
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Debbie Rose

CAP Timeline

Click on the timeline image below to view CAP’s full history.
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CAP group picture

The Center for Automata Processing

The University of Virginia and Micron Technology, Inc. co-founded the Center for Automata Processing (CAP) to catalyze the growth of an ecosystem around automata processing. Micron’s Automata Processor, a hardware implementation of automata computing, is poised to dramatically accelerate solutions aimed at big data challenges.

CAP is a collaboration of universities, companies and government agencies. The Center’s objectives are to develop innovative technologies and applications that address industry, government and societal needs, and to train future data scientists and engineers in this groundbreaking approach to computing.

We aim to achieve these objectives through four core activities:

1. Enable collaborative research and education opportunities in the foundation and application of automata processing across universities and research laboratories.

2. Leverage AP technology to develop innovative applications that address industry, government, and societal needs.

3. Create a public-private open innovation research network to speed commercialization and adoption of new AP technologies.

4. Provide access to AP hardware, SDK, training, and research workshops.

Academic Membership Application

 

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Machine Learning Application: Tree Kernels

 

There are many real world applications such as XML data, parse trees in natural language processing, and protein sequences in bioinformatics that can be represented by tree structures. The conventional methods used for tree structured data classification are based on dot products on the feature vectors; this can be very expensive since those vectors can be extremely large.

Tree Kernel methods have proved to be a state of the art technique for many real world problems and they are able to process tree-based information without using an explicit representation of inputs. The main bottleneck of the current solutions of the tree kernels is the processing time and because the tree structure is complex, the timing complexity is the limiting factor for the tree kernel methods. In this project, we are going to propose a novel automata solution for convolution-based tree kernels on the AP. Our method can be applied to the applications that can be represented by the ordered and unordered labelled trees such as sentiment analysis in natural language processing.

By Elaheh Sadredini

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Performance Evaluation of Regular Expression Engines Across Different Computer Architectures

 

This project focuses on regular expression matching which is playing an important role in a variety of applications, like genome sequence analysis, data mining, network inspection, etc. Different kinds of architectures such as CPU, XeonPhi, GPU, FPGA can perform regular expression matching. However, it is difficult on Von-Neumann architectures since it requires high irregular parallelism, high memory bandwidth as well as low latency.

Micron’s Automata Processor (AP) is designed for this kind of problem, using DRAM as a highly parallel reconfigurable fabric to implement NFAs. In this work we investigate for a fair comparison of best effort regular expression processing engines across all these aforementioned architectures which involves analyzing their performances with different types of regular expressions and exploring the design spaces of each of these architectures.

Our preliminary results indicate that CPU, XeonPhi and GPU are most likely bottlenecked by memory latency for rule lookup and AP and FPGA outperform other architectures due to their high capacity, their massively parallel execution and their capabilities of processing new input symbol every clock cycle. Furthermore, unlike FPGA, AP’s throughput is immune to complexity of NFA topologies and rulesets (i.e. large number of transitions, active states).

In the future work, we continue to explore the performance evaluation on more dimensions: “complexity” of regular expressions, the number of regular expressions, and multiple packets (streams) processing capability. We also extend the work to other benchmark suites that are not natural fits for regular expression, such as association rule mining, Markov chains, String kernel etc.

By Tommy Tracy

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Entity Resolution Acceleration Using AP

Entity Resolution (ER), the process of finding identical entities across different databases, is critical to many information integration applications. As sizes of databases explode in the big-data era, it becomes computationally expensive to recognize identical entities for all records with variations allowed across multiple databases. Profiling results show that approximate matching is the primary bottleneck.

Micron’s Automata Processor (AP), an efficient and scalable semiconductor architecture for parallel automata processing, provides a new opportunity for hardware acceleration for ER. We propose an AP-accelerated ER solution, which accelerates the performance bottleneck of fuzzy matching for similar but potentially inexactly-matched names, and use a real-world application to illustrate its effectiveness. Results show promising speedups for matching one record, with better accuracy over the existing CPU method.

By Dang, Vinh Quang

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Sequence alignment in Bioinformatics using Micron’s Automata processor:

Sequence alignment refers to arranging sequences of DNA, RNA, or protein against reference sequences to identify regions of similarity in Bioinformatics. The major challenge is that the reads do not always perfectly match with references, and approximate matching is needed. The process is computationally expensive to compare large number of different reads against long references when fuzziness is allowed.

Micron’s Automata Processor (AP) is an efficient and scalable semiconductor architecture for parallel automata processing.  The AP is based on an adaption of memory array architecture, exploiting the inherent bit-parallelism of traditional SDRAM. This new in-memory processing hardware architecture provides a new opportunity for sequence alignment. We use the new hardware to accelerate DNA alignment and compare with other famous sequence alignment tools (Bowtie2, Bowtie and PatMaN).

Results show at least $10$x speedup is achieved and more than 10000x speedup could be achieved when more variations are needed.

By Chunkun Bo

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